Etched
AI
AdvancedPackagingSI/PIEngineer
Neural analysis suggests this role is
optimal for Senior candidates.
“Advanced Packaging SI/PI Engineer at Etched. Skills: SI/PI analysis, PDN design, high-speed signaling, advanced packaging. SI/PI analysis of designs and optimization within 2D/2.5D/3D packages. Drive SI requirements into interposer/substrate layout (high-speed routing: 112G/224G) from preliminary design through tape-out.”
What You'll Achieve.
electrical performance of our AI accelerator platform across silicon, package, and board; world-class platforms; pushing what is possible in power delivery and high-speed signaling for transformer-purposed silicon
Industry & Context.
analytical skills; think from first principles
fully in-person team
What They're Looking For.
Must Have
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field with a understanding of signal integrity and power integrity concepts and fundamentals., 8+ years of SI/PI experience on high-performance ASIC, processor, or accelerator platforms., Proven experience defining and closing PDN for high-power silicon, including substrate and PCB plane design, decap strategy, and dynamic IR analysis., Experience with developing systems with high-speed interfaces like HBM, SerDes and D2D interfaces., Hands-on expertise with one or more of: ANSYS HFSS / SIwave, Cadence Sigrity (PowerSI / PowerDC), Keysight ADS., Experience with CoWoS or equivalent advanced packaging materials and technologies including interposer SI/PI implications, C4 bump planning, and substrate stack-up trade-offs., Track record of designing and correlating SI/PI test vehicles against silicon measurement during bring-up and lab characterization., analytical and communication skills, comfortable presenting risk, sign-off status, and trade-offs to cross-functional leadership., Deeply creative and able to think from first principles.
Nice to Have
Familiarity with full RTL-to-GDSII context and how PD decisions interact with package and board PDN., Experience with multi-die, 2.5D, or 3D packaging signoff, including chip-package-system (CPS) co-design., Project management experience coordinating across internal teams, OSAT partners, and PCB ODMs., Familiarity with transformer models, accelerator architectures, or HPC system design., Startup experience or comfort working in fast-paced environments.
What You'll Do.
SI/PI analysis of designs and optimization within 2D/2.5D/3D packages
Drive SI requirements into interposer/substrate layout (high-speed routing: 112G/224G) from preliminary design through tape-out.
Drive PDN design and decoupling strategy across substrate and interposer
and impedance targets across all rails.
Own ball map / C4 / BGA pin assignment from soft freeze through final freeze in partnership with package layout
and board layout teams.
Support board-level SI/PI and rack-level scale-up topology studies
including rack test vehicle design and cable characterization.
How You'll Work.
Team & Collaboration
Close interaction with Package Layout Designers, ASIC PD and IP teams as well as Board Schematic/Layout/SI/PI teams to optimize the best electrical performance; Participating in cross-functional meetings and design reviews.; co-design world-class platforms with OSAT and ODM partners.; coordinating across internal teams, OSAT partners, and PCB ODMs.
Communication Scope
analytical and communication skills; comfortable presenting risk, sign-off status, and trade-offs to cross-functional leadership
Process & Methodology
Project management experience coordinating across internal teams, OSAT partners, and PCB ODMs.
Full Job Description
About Etched Etched is building the world’s first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. Job Summary As a Signal & Power Integrity Engineer you will be responsible for the electrical performance of our AI accelerator platform across silicon, package, and board. The ideal candidate will have extensive experience with high-power package and board designs, robust power delivery networks, and high-speed signaling solutions in advanced packaging. You will work closely with silicon, package, platform, and system teams to co-design world-class platforms with OSAT and ODM partners. Intense focus on pushing what is possible in power delivery and high-speed signaling for transformer-purposed silicon. Key Responsibilities - SI/PI analysis of designs and optimization within 2D/2.5D/3D packages - Close interaction with Package Layout Designers, ASIC PD and IP teams as well as Board Schematic/Layout/SI/PI teams to optimize the best electrical performance - Drive SI requirements into interposer/substrate layout (high-speed routing: 112G/224G) from preliminary design through tape-out. - Drive PDN design and decoupling strategy across substrate and interposer, owning DC IR drop, dynamic IR drop, and impedance targets across all rails. - Own ball map / C4 / BGA pin assignment from soft freeze through final freeze in partnership with package layout, ASIC PD, and board layout teams. - Support board-level SI/PI and rack-level scale-up topology studies, including rack test vehicle design and cable characterization. - Participati
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